{"id":22168,"date":"2023-11-22T08:25:32","date_gmt":"2023-11-22T08:25:32","guid":{"rendered":"http:\/\/care.ac.in\/engineering\/?p=22168"},"modified":"2023-11-22T08:25:32","modified_gmt":"2023-11-22T08:25:32","slug":"guest-lecture-on-advanced-logic-design-techniques-in-asynchronous-sequential-circuit-synthesis","status":"publish","type":"post","link":"https:\/\/care.ac.in\/engineering\/2023\/11\/22\/guest-lecture-on-advanced-logic-design-techniques-in-asynchronous-sequential-circuit-synthesis\/","title":{"rendered":"Guest Lecture on Advanced Logic Design Techniques in Asynchronous Sequential Circuit Synthesis"},"content":{"rendered":"<p>Department of ECE Organized a guest lecture forII ECE Studentsf or the course EC3352 Digital System Design on the topic \u201c<b>Advanced Logic Design Techniques in Asynchronous Sequential Circuit Synthesis\u201d <\/b>on 21.11.2023 from 10.30 a.m-12.30 p.m. The expert member Mr. T. Muruganantham, Assistant Professor, Department of Electronics and Communication Engineering, K.Ramakrishnan College of Engineering, Trichy delivered his lecture on fundamental mode circuit design. Another Expert member Mr. N.R. Nagarajan, Assistant Professor, Department of Electronics and Communication Engineering, K.Ramakrishnan College of Engineering, Trichy delivered his lecture on hazards and race-free state assignment design. Both sessions were very informative and helpful to the students in enriching their knowledge of the concepts of asynchronous sequential circuits.<\/p>\n<p><img fetchpriority=\"high\" decoding=\"async\" class=\" wp-image-22171 aligncenter\" src=\"https:\/\/care.ac.in\/engineering\/wp-content\/uploads\/sites\/7\/2023\/11\/DSD-GL-21.11.23-212x300.png\" alt=\"\" width=\"359\" height=\"508\" \/><\/p>\n<p style=\"text-align: center\">\n<p><img decoding=\"async\" class=\"alignnone  wp-image-22172 aligncenter\" src=\"https:\/\/care.ac.in\/engineering\/wp-content\/uploads\/sites\/7\/2023\/11\/photo-3-300x138.jpg\" alt=\"\" width=\"515\" height=\"237\" \/><\/p>\n<p><img decoding=\"async\" class=\"alignnone  wp-image-22170 aligncenter\" src=\"https:\/\/care.ac.in\/engineering\/wp-content\/uploads\/sites\/7\/2023\/11\/Photo-1-300x142.jpg\" alt=\"\" width=\"518\" height=\"245\" \/><\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"alignnone  wp-image-22169 aligncenter\" src=\"https:\/\/care.ac.in\/engineering\/wp-content\/uploads\/sites\/7\/2023\/11\/Photo-2-300x131.jpg\" alt=\"\" width=\"531\" height=\"232\" \/><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Department of ECE Organized a guest lecture forII ECE Studentsf or the course EC3352 Digital System Design on the topic \u201cAdvanced Logic Design Techniques in Asynchronous Sequential Circuit Synthesis\u201d on 21.11.2023 from 10.30 a.m-12.30 p.m. The expert member Mr. T. Muruganantham, Assistant Professor, Department of Electronics and Communication Engineering, K.Ramakrishnan College of Engineering, Trichy delivered [&hellip;]<\/p>\n","protected":false},"author":8,"featured_media":22171,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[17,18],"tags":[],"post_folder":[],"class_list":["post-22168","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-ece-events","category-engineering-events"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v26.3 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Guest Lecture on Advanced Logic Design Techniques in Asynchronous Sequential Circuit Synthesis - CARE College of Engineering<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/care.ac.in\/engineering\/2023\/11\/22\/guest-lecture-on-advanced-logic-design-techniques-in-asynchronous-sequential-circuit-synthesis\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Guest Lecture on Advanced Logic Design Techniques in Asynchronous Sequential Circuit Synthesis - CARE College of Engineering\" \/>\n<meta property=\"og:description\" content=\"Department of ECE Organized a guest lecture forII ECE Studentsf or the course EC3352 Digital System Design on the topic \u201cAdvanced Logic Design Techniques in Asynchronous Sequential Circuit Synthesis\u201d on 21.11.2023 from 10.30 a.m-12.30 p.m. The expert member Mr. T. Muruganantham, Assistant Professor, Department of Electronics and Communication Engineering, K.Ramakrishnan College of Engineering, Trichy delivered [&hellip;]\" \/>\n<meta property=\"og:url\" content=\"https:\/\/care.ac.in\/engineering\/2023\/11\/22\/guest-lecture-on-advanced-logic-design-techniques-in-asynchronous-sequential-circuit-synthesis\/\" \/>\n<meta property=\"og:site_name\" content=\"CARE College of Engineering\" \/>\n<meta property=\"article:published_time\" content=\"2023-11-22T08:25:32+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/care.ac.in\/engineering\/wp-content\/uploads\/sites\/7\/2023\/11\/DSD-GL-21.11.23.png\" \/>\n\t<meta property=\"og:image:width\" content=\"1414\" \/>\n\t<meta property=\"og:image:height\" content=\"2000\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/png\" \/>\n<meta name=\"author\" content=\"ecedept\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"ecedept\" \/>\n\t<meta name=\"twitter:label2\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data2\" content=\"1 minute\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\/\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\/\/care.ac.in\/engineering\/2023\/11\/22\/guest-lecture-on-advanced-logic-design-techniques-in-asynchronous-sequential-circuit-synthesis\/#article\",\"isPartOf\":{\"@id\":\"https:\/\/care.ac.in\/engineering\/2023\/11\/22\/guest-lecture-on-advanced-logic-design-techniques-in-asynchronous-sequential-circuit-synthesis\/\"},\"author\":{\"name\":\"ecedept\",\"@id\":\"https:\/\/care.ac.in\/engineering\/#\/schema\/person\/3fb388e938b714622f9ec8a18ce25ada\"},\"headline\":\"Guest Lecture on Advanced Logic Design Techniques in Asynchronous Sequential Circuit Synthesis\",\"datePublished\":\"2023-11-22T08:25:32+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\/\/care.ac.in\/engineering\/2023\/11\/22\/guest-lecture-on-advanced-logic-design-techniques-in-asynchronous-sequential-circuit-synthesis\/\"},\"wordCount\":127,\"commentCount\":0,\"publisher\":{\"@id\":\"https:\/\/care.ac.in\/engineering\/#organization\"},\"image\":{\"@id\":\"https:\/\/care.ac.in\/engineering\/2023\/11\/22\/guest-lecture-on-advanced-logic-design-techniques-in-asynchronous-sequential-circuit-synthesis\/#primaryimage\"},\"thumbnailUrl\":\"https:\/\/care.ac.in\/engineering\/wp-content\/uploads\/sites\/7\/2023\/11\/DSD-GL-21.11.23.png\",\"articleSection\":[\"ECE Events\",\"Engineering Events\"],\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"CommentAction\",\"name\":\"Comment\",\"target\":[\"https:\/\/care.ac.in\/engineering\/2023\/11\/22\/guest-lecture-on-advanced-logic-design-techniques-in-asynchronous-sequential-circuit-synthesis\/#respond\"]}]},{\"@type\":\"WebPage\",\"@id\":\"https:\/\/care.ac.in\/engineering\/2023\/11\/22\/guest-lecture-on-advanced-logic-design-techniques-in-asynchronous-sequential-circuit-synthesis\/\",\"url\":\"https:\/\/care.ac.in\/engineering\/2023\/11\/22\/guest-lecture-on-advanced-logic-design-techniques-in-asynchronous-sequential-circuit-synthesis\/\",\"name\":\"Guest Lecture on Advanced Logic Design Techniques in Asynchronous Sequential Circuit Synthesis - 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